Approaches for NBTI / PBTI

Positive Bias Temperature Instability (PBTI) and NBTI risk can be located with Insight Analyzer with a few different approaches. Before going into details, let's outline some of the basics:

• Relates to the Gate voltage vs Bulk bias.
• Degradation impacts the transfer curve of a MOSFET, while the MOSFET may continue to operate.
• PBTI is greater concern in analog circuits, less in digital circuits.
• Long-term degradation that isn't predicted in simulation models.

Native Approach

Insight Analyzer looks for PBTI cases while performing the "Power Connections" ERC scan. Before the scan, option must be set for "bulk invalid voltage". Because PBTI is one just one manifestation of a badly-biased FET body, this type of violation is reported as a by-product of running the general body bias checks. In other words, there isn't a specific option dedicated to PBTI checking. If a logic circuit has badly-biased FET bulks, they won't be reported as "PBTI" because CMOS logic doesn't depend on the subtle characteristics of transconductance that PBTI impacts. For such logic cases, they will be reported with other terms such as "Logic Body Invalid Voltage", or possibly "Missing Level Shifter" depending on the source/drain levels. For non-logic circuits, and circuits known to be analog, the violations will be reported as "PBTI".

Summary of the native approach:

• Use native "Power Connections" ERC, set options for bulk voltage checking.
• Look for "PBTI" in the violations.
• Will be re-worded (not "PBTI") for logic circuits.

Custom Approach

Another approach to finding PBTI cases is to write a custom iterator that visits only the devices or circuits of most concern. You might do this to focus on specific parts of a bigger circuit, to focus on specific analog models known to be susceptible, to weed out cases where the bias levels don't meet a certain threshold value, etc.

There are basically two parts to solving the problem with this approach:

• Decide how to visit the devices. Do you want to 'cscan instances' of specific model names? Or do you want to 'cscan cells' and look only at specific blocks, such as analog? Or perhaps 'cscan net pins' of specific Nwell / Pwell rails?
• Given a specific FET instance, call the command 'cdb inst $i getVgb -signed' (valid only with 4.31-6130 and higher).

Example

cscan instances {
   if {[ cdb inst %i isNmos ] || [ cdb inst %i isPmos ]} {
      puts "%i [ cdb inst %i getCell ] [ cdb inst %i getVgb -signed ]"
   }
}