When working with large or complex designs, it may be beneficial to limit the scope of a scan in order to optimize performance and speed run times. The Analyzer provides two ways in which to do so:
- You can replace any cell and its underlying hierarchy with a black box. This is done by selecting the Cell Review option when loading a netlist in the GUI or by using the -blackBoxing option of the csrc load API command. Cells replaced by a black box are not loaded by the Analyzer, though you can specify port characteristics allowing the Analyzer to validate the cell's interface to other circuitry.
For more information, see the article Replacing Cells with Black Boxes.
- You can apply the Avoid property to any cell after the netlist has been loaded. The cell and all of its underlying hierarchy remain in memory, but it will be exlcuded from further analysis. A cell's Avoid property can be changed as necessary allowing dynamic scoping at runtime. The Avoid property is applied using the Circuit Hierarchy pane in the Circuit tab of the GUI.
For more information on using the Avoid property, see the chapter titled The Circuit Browser and Finder in the User's Manual.
The following table outlines the difference between these two methods of limiting scope:
|Method||Cell Loaded to Memory?||Controlled at Run Time?||Can Improve Load Time?||Can Improve Run Time?|
|Applying the Avoid Property